state of data bus in store instruction
I am just confused on at the store instruction in assembly. when the address bus carries the memory address to be written to, what is the state of the data bus. Does it carry the memory contents of the address pointed to by
Yes in a simplistic processor/model the address computed by the instruction is put on the address bus, if this is a write then the data goes on the data bus, there is often a write strobe of some sort of indication to the memory that this is a write operation as well as some sort of an enable to tell the memory that this is actually a memory cycle. to simplify logic sometimes the data bus and even address bus is allowed to do whatever and is only valid when the proper enables/strobes are present.
http://github.com/dwelch67 has logic simulators you can run to see this in action. The amber_samples repo and the mips1_core_samples also allows you to see busses in action.
I say simplistic because once caches and mmu's get involved, things get more complicated. The addresses can change, many reads may be required to perform one simple write. Deep down in the core of the processor, the memory bus nearest the core will still resemble some sort of address and data bus that takes the bits from your instruction and puts them on those busses.
No two processor families are the same, an ARM and an x86 and a mips have no reason to resemble each other in any way and may very well not look the same even though on all of them you can say for example store the value 0x1234 to the address 0x1000 using an instruction.